The present invention relates, in general, to a microfabrication process for making enclosed structures, and more particularly to a process for fabricating microfluidic tunnels, cavities, channels and similar structures suspended above a substrate or embedded below the surface of a substrate such as a single crystal silicon wafer, to the tunnels, cavities and related enclosed microstructures so fabricated, and to microfabricated systems or devices incorporating such enclosed structures.
Microfabrication holds the promise of dramatically improving the efficacy and cost of fluid processing systems. In general, microfabrication enables the production of large numbers of nearly identical devices, and as the number of devices produced by this technique increases, the cost per device decreases. As technology improves, which is inevitable considering the investment in and success of the semiconductor industry, the ability to fabricate microfluidic systems will also improve.
Early developments in micromechanics successfully led to the fabrication of microactuators utilizing processes which involved either bulk or surface micromachining. The most popular surface micromachining process used polysilicon as the structural layer in which the mechanical structures were formed. In a typical polysilicon process, a sacrificial layer was deposited on a silicon substrate prior to the deposition of the polysilicon layer. The mechanical structures were defined in the polysilicon, and then the sacrificial layer was etched partially or completely down to the silicon substrate to free the structures. Moving rotors, gears, accelerometers and other structures were fashioned through the use of this process to permit relative motion between these structures and the substrate. This process relied on chemical vapor deposition (CVD) to form the alternating layers of oxide and polysilicon and provided significant freedom in device design. However, CVD silicon was usually limited to layers no thicker than one or two micrometers.
An alternative was the use of bulk micromachining wherein a silicon substrate was etched and sculpted to leave a structure. This was typically done using wet chemical etchants such as EDP. However, such processes were dependent on the crystal orientation within the silicon substrate, with the result that the process was difficult to control. Accordingly, wet etch processes were not applicable to small structure definition.
To overcome the disadvantages of the forgoing processes, a reactive ion etching (RIE) process for the fabrication of submicron, single crystal silicon, movable mechanical structures was developed and is described in U.S. Pat. No. 5,198,390, assigned to the Assignee of the present application. That process utilized multiple masks to define structural elements and metal contacts, and permitted definition of small, complex structures in single crystal silicon. This process required a second lithography step which was difficult to apply to deeper structures because of problems in aligning the second mask, and accordingly a single-mask low temperature, self-aligned process for fabricating micron scale microelectromechanical (MEM) structures was developed and is described in U.S. Pat. No. 5,719,073, the disclosure of which is hereby incorporated herein by reference. The process described in the ""073 Patent is a dry bulk micromachining process which uses reactive ion etching to both define and release structures of arbitrary shape having minimum dimensions of about one or two micrometers (i.e., micron-scale) and to provide defined metal surfaces on the release structures, as well as on stationary interconnects, pads, and the like. The single mask process permits fabrication of complex shapes, including triangular and rectangular structures as well as curved structures such as circles, ellipses and parabolas, for use in the fabrication of fixed and variable inductors, transformers, capacitors, switches and the like. The structures are released from the underlying substrate in the fabrication process, allowing them to be moved with respect to the substrate.
Although the single mask process described in the ""073 Patent had numerous advantages and permitted fabrication of a wide variety of microelectromechanical structures on the surface of substrates, it was recognized that micron-scale structures located beneath the surface of the substrate would have a wide range of applications, and accordingly a process for producing such structures was described in the aforesaid co-pending application Ser. No. 08/867,060. As described therein, a process for fabricating enclosed micron-scale structures having minimum dimensions on the order of ten microns or less was developed. The enclosed structures included micron-scale cavities, tunnels, or other subsurface enclosures for carrying fluids such as gases or liquids under controlled conditions for use in electrophoresis, for use as ink jet nozzles, and the like. The microfabrication process utilized in that application was compatible with existing integrated circuit processes and structures so that it could be carried out on chips or wafers containing integrated circuits, and in addition was highly controllable to permit the fabrication of enclosed tunnel-like structures in a substrate and in a wide range and variety of configurations.
Microstructures in accordance with the ""060 application were capable of use in biological and chemical synthesizers and analyzers, in gas sensors, ink dispensers for printers, and pressure sensors, in display devices, in optical applications, and the like. The subsurface structures were embedded in a substrate, or could be suspended by way of released beams, and could be fabricated in a wide range of cross sectional sizes and shapes. In accordance with that application, the subsurface structures were fabricated in single crystal silicon utilizing the SCREAM process described in the aforesaid U.S. Pat. No. 5,719,073. Thus, an isotropic silicon etch was used to produced a subsurface cavity beneath and along via channels to produce subsurface cavities conforming to the location of the via channels. The diameter, or cross-sectional size, of each cavity was determined by the duration of the etch. Thereafter, an oxide layer was deposited on the top surface of the substrate to fill in and cover the via channels to seal the entrances to the respective subsurface cavities. This formed enclosed subsurface structures having shapes and dimensions determined by the via channels and the etch duration. Thereafter, if desired, the subsurface structure could be located in a released beam by etching around the location of the subsurface cavity.
Microfabrication techniques applied to the construction of fluid processing systems have yielded a number of advantages over conventional fluid systems. Foremost are the benefits derived from the miniaturization of the system, including making systems more portable, making more efficient use of expensive reagents or limited samples, and by providing increased speed and sensitivity of chemical analyses. The ability to fabricate complex miniature systems also enables fundamental studies of fluid behavior on a microscale. Further, the tendency toward integration of microfabricated systems promises high degrees of automation and the parallel nature of the process and the capability to produce high volumes of devices leads to the ability to easily scale processing speed and throughput. Finally, the prospect of large numbers of inexpensive systems allows the realization of disposable systems to avoid contamination.
The foregoing and other advantages have led to an increase in research in microfluidics, with a number of products depending on fluidics having been developed; most notably the ink jet printer. Areas of additional research include the behavior of fluids on a microscale, fabrication of microfluidic components such as pumps and valves, and development of a wide range of sensors for parameters such as pressure, temperature, flow rate and pH. Further, such research has led to the development of systems such as micro total analysis systems, and the adaptation of analytical methods such as capillary electrophoresis and PCR.
The greatest benefits of such developments will be derived from the implementation of microfluidic systems, as opposed to isolated components. Only from a systems standpoint will the cost benefits be realized and automation be possible. For example, unless sample preparation is integrated into the system, the advantages of microfabricated fluidic devices will be limited in terms of cost, time and throughput. Thus, a number of integration issues must be taken into account when developing processes for fabricating fluidics systems, for it will be important to integrate such systems with electronic controls, with sensing, with feedback and logic and the like. Further, standard analytical techniques such as optical excitation and interrogation of chemical reactions must be considered, and integration with existing MEMS technology must be considered.
The present invention is directed to an improved process for fabricating microfluidic systems which requires only two or three masking steps, depending on the application, and which utilizes common VLSI equipment and techniques. The process is straightforward and robust, and takes into account the issues discussed above for a system approach. It is closely related to the SCREAM process (as described in U.S. Pat. No. 5,198,390 and U.S. Pat. No. 5,719,073 discussed above), and in this manner leverages the considerable development effort already expended and further relies on the capabilities already developed in the area of integration of MEMS structures with electronics, with the fabrication of large displacement actuators, with studies of the design considerations for large scale MEMS devices, and with the integration of optical components.
One of the most significant distinctions between the present invention and previous processes for fabricating microfluidic channels is the procedure for forming and suspending above a substrate a movable beam incorporating a channel. In accordance with the present invention, the location, size and shape of a released channel beam is defined by first etching trenches having vertical sidewalls in the substrate through a mask formed of a material resistant to silicon etchants. Such a material may be an oxide or nitride layer, a resist layer, or other suitable material, but which will be referred to hereinafter as an oxide or mask layer for convenience. The vertical sidewalls of the resulting trenches on each side of the beam are oxidized, or have oxide deposited thereon, and one or more channel vias leading to the interior of the beam between the oxidized walls are opened through the mask. The silicon substrate material within the beam between the sidewalls is then completely etched to a desired depth to form a hollow channel, leaving the oxide mask material on the top of the channel, and leaving the oxide side walls intact, with the remaining silicon forming a bottom wall. This results in a beam channel below the original surface of the substrate. The etching step also etches the trenches to release the beam by undercutting it, thereby producing a released beam channel. The size and shape of the channel is defined primarily by the oxide side walls of the trenches, rather than solely by the duration of the etch, as in prior processes. The resulting released microchannels can be moved and vibrated, thus providing a novel pumping mechanism and permitting the sensing of fluid parameters through resonant frequency shifts or through other changes in the dynamic behavior of the device. The process also yields optical access to the channel over most of its surface area. Furthermore, thermal isolation between channel regions is possible, and the process of the invention introduces techniques for mixing or separating fluids, which is not trivial in the highly laminar flow regime present in microchannels.
More particularly, the process of the invention includes a first step of depositing a mask layer such as oxide on the surface of a single crystal silicon wafer, or substrate. Next, the size, shape and location of beams, as well as the location of channel vias for use in producing hollow interior channels or cavities in the beams, are defined with a single mask, and the pattern of the beams and the channel vias is etched through the oxide mask layer. A resist is spun onto the surface of the wafer and is patterned so that the vias are protected from subsequent etching. Thereafter, the beams are formed by etching trenches surrounding the beams through the beam pattern into the silicon by way of a vertical deep reactive ion etch, with the oxide and resist acting as a mask. The resist is then stripped to expose the channel vias and a conformal layer of oxide is deposited over the entire surface of the wafer. Thereafter, an anisotropic etch is used to etch back from all the horizontal surfaces the oxide layer that was just deposited; that is, from the trench floors and from the top surface of the beam where the channel vias are located. Optionally, another vertical silicon etch is then carried out to define the approximate depth of the channels or cavities to be formed within the beams. This step deepens the trenches surrounding the beam and etches a pilot channel through the channel vias to provide improved control of the depth of the beam channels. The next step is an isotropic silicon etch that etches the silicon material of the beam through the vias, enlarging the pilot channel and preferably etching the interior of the beam completely to the oxide side walls. In addition, the isotropic etching step etches the trenches to release the beams. Finally, the via channels are sealed along the top of the beam, preferably by a PECVD oxide deposition during which the oxides build up rapidly at corners so that the channel vias are bridged by a sealing layer of the oxide. Metal is then deposited over the entire wafer, but because the self aligned metalization technique described in the aforesaid U.S. Pat. No. 5,719,073 is used, no patterning of the metal is necessary. At this point, if desired, an additional but optional lithography step using a thick resist can be used to define areas where the metal can be removed. This may desirable for optical viewing into the channel, as well as for removing metal films from springs to change their dynamic properties.
If desired, the channel vias can be sealed by a metal layer instead of a PECVD oxide to permit an electrical connection to a fluid carried in the beam channel.
The simplest version of the forgoing process requires only two masks, one to define the channel vias and the trenches which produce the released structures, and another to protect the vias. The entire process is closely related to the SCREAM process of the ""073 patent, and therefore integrates well with actuators and devices constructed using that process.
In the preferred form of the invention described above, the channel vias are longitudinally aligned with the beams, but this alignment places lower limits on the width of the channels. A variation of the present invention allows the creation of arbitrarily narrow channels which would not otherwise be possible due to mask alignment or resolution limits. This is important in cases where the suspended channels form springs. When providing the aligned channel vias, the narrowest channel available is three times the minimum feature size. To overcome this limitation, the beams and channel vias can be defined separately through the use of two masks. In this case, the channel vias are oriented by one mask so that they cross the beam, thereby allowing the width of the channel vias to be independent of the width of the beam, which is defined by a second mask. Alignment is not an issue, since a shift of the relative positions of the mask layers still leaves channel vias crossing the beams.
All structures produced in accordance with the present invention can be formed utilizing two basic structural elements; beams and channel vias. Beams are typically narrow, high aspect ratio structures suspended above a substrate, while channel vias are openings in the masking layer through which an etching gas passes to etch channels in the beam. The volatile etch products are also removed through these vias. In accordance with the invention, most channel vias are eventually sealed with a deposited film, but some may be left open.
A variety of structures can be built from the foregoing basic building elements. Thus, suspended channels, embedded channels, solid beams and ports can all be provided. Suspended channels are formed from a combination of beams and channel vias. In this case, the beams are first etched and then the channel vias are used to hollow out the top portion of the beams. Embedded channels occur where there are channel vias but no beams. Solid beams exist where there are beams but no channel vias. Finally, ports which give off-chip access to the channels are formed from vias which are too large to be sealed.